Spartan-3E FPGA: Option Headers

Six-Pin Accessory Headers J1 and J2

Figure 15-11 provides the User Constraint File (UCF) constraints for accessory headers,

including the I/O pin assignment and the I/O standard used. These header connections

are shared with the FX2 connector, as shown in Figure 15-7, page 122.

# ==== 6-pin header J1 ====

# These four connections are shared with the FX2 connector

#NET “J1<0>” LOC = “B4″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J1<1>” LOC = “A4″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J1<2>” LOC = “D5″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J1<3>” LOC = “C5″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

# ==== 6-pin header J2 ====

# These four connections are shared with the FX2 connector

#NET “J2<0>” LOC = “A6″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J2<1>” LOC = “B6″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J2<2>” LOC = “E7″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J2<3>” LOC = “F7″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

# ==== 6-pin header J4 ====

# These four connections are shared with the FX2 connector

#NET “J4<0>” LOC = “D7″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J4<1>” LOC = “C7″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J4<2>” LOC = “F8″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;

#NET “J4<3>” LOC = “E8″ | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;